FIG. 1 is an illustration of a conventional imaging system 100. The system 100 includes an N×M array 110 of pixels P. The system 100 may be monochromatic or color. If system 100 is a color system, the pixels P in the array 110 would be sensitive to the primary colors of red, green, or blue, and would typically be arranged in a Bayer pattern (i.e., alternating rows are comprised of green/red and blue/green sensitive pixels in adjacent columns).
Each pixel P in array 110 converts incident light into electrical energy, which is output as an electrical signal. The signals from the N pixels forming a row in array 110 are typically output on respective column lines to respective sample-and-hold circuits 120, which store the electrical signals. These signals are then selected, one pixel at a time, for further processing by driver 130, and then converted into a digital signal by analog-to-digital converter (ADC) 140. The digital signals are further processed by digital processing section 150, and then stored by storage device 160. When all the signals stored in the sample-and-hold circuits 120 have been processed, another row of signals is output and stored in sample-and-hold circuit 120 and the processing continues until each row of the N×M array 110 has been processed. The above described processing may be controlled by control circuit 170. Alternatively, control circuit 170 may include a plurality of control circuits.
The driver 130 may be an amplifier with programmable gain that increases lower level signals resulting from lower light level conditions in an attempt to utilize the full range of the ADC stage.
In addition, each pixel typically has a color filter over it, so that each pixel is responsive to light only in a given frequency band, typically corresponding to either a red, green, or blue color. In addition to the color filter, the silicon of the pixels converts different frequencies of light with different efficiencies. The conversion efficiency is greater for the red color band than for the blue color band. Thus, the amplification needed for each of the color band signals is different.
For economic reasons in fabricating integrated circuits, it is important to keep the size of the integrated circuit die small. As such, increasing the number of pixels in an image sensor array results in an effort to reduce the size of the individual pixels, so as to keep the overall die size as small as possible. The smaller pixel sizes reduce the light sensitivity of the pixels and cause a need for higher programmable amplifier gains. Higher pixel counts lead to faster system clock speeds, in order to be able to capture an image in a desired period of time.
Typically, when an amplifier is designed, the requirements for the amplifier in terms of gain and frequency response are determined. The amplifier is designed so that it achieves a desired output settling at the maximum bandwidth (speed of signal capture and processing), while amplifying the signal at the maximum gain setting.
The modern CMOS image sensor, typically, integrates the programmable gain amplifier (PGA) and the ADC on a single chip. In the chip, a sample-and-hold (S&H) stage converts the unipolar pixel output into a bipolar fully differential signal, in order to increase signal-to-noise ratio. At the same time, the S&H stage multiplies the input signal by a ratio of a feedback capacitor size to the sampling capacitor size. If the total input capacitance changes with the gain, the PGA cannot optimize its performance very well.
Accordingly, there is a need for a method and a system for performing a sample and hold (S&H) function and a variable amplification (gain) function in a PGA that has a fixed total input capacitance, regardless of the stage gain.